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MOV             Move Data                            Flags: Not altered

MOV destination,source

        Logic   destination . source

    MOV transfers (copies) a byte, word, or (80386+) doubleword from
    the source operand to the destination operand.


                Note
                MOV cannot move from memory to memory or from
                a segment register to a segment register.


    A MOV into SS inhibits all interrupts until after the execution of
    the next instruction, which is presumably a MOV into SP/ESP. (Some
    early 8088/8086 processors don't disable interrupts properly after
    a MOV into SS; remedy: CLI/STI.)


    Protected mode
    If the destination operand is a segment register (DS,ES,SS,FS,GS)
    the value moved must be a selector. Loading the selector initiates
    automatic loading of the descriptor information associated with
    that selector into the programmer-invisible part of the segment
    register; loading also initiates validation of both the selector
    and the descriptor information.


    Opcode      Format
    88 /r       MOV  r/m8,r8
    89 /r       MOV  r/m16,r16
    89 /r       MOV  r/m32,r32
    8A /r       MOV  r8,r/m8
    8B /r       MOV  r16,r/m16
    8B /r       MOV  r32,r/m32
    8C /r       MOV  r/m16,Sreg
    8E /r       MOV  Sreg,r/m16
    A0          MOV  AL,moffs8
    A1          MOV  AX,moffs16
    A1          MOV  EAX,moffs32
    A2          MOV  moffs8,AL
    A3          MOV  moffs16,AX
    A3          MOV  moffs32,EAX
    B0 + rb     MOV  r8,imm8
    B8 + rw     MOV  r16,imm16
    B8 + rd     MOV  r32,imm32
    C6          MOV  m8,imm8
    C7          MOV  m16,imm16
    C7          MOV  m32,imm32


    MOV to/from special registers                    CPU: 386+ Priv

    In protected mode, MOV to/from a special register is a privileged
    instruction and can be executed only if CPL=0. 32-bit operands are
    always used with these instructions, regardless of the operand-size
    attribute.

    Note that the CR4 register was introduced with the Pentium, and that
    the test registers do not exist on the Pentium or the Pentium Pro.


    Opcode      Format
    0F 20 /r    MOV  r32,CR0/CR2/CR3/CR4
    0F 21 /r    MOV  r32,DR0/DR1/DR2/DR3/DR6/DR7
    0F 22 /r    MOV  CR0/CR2/CR3/CR4,r32
    0F 23 /r    MOV  DR0/DR1/DR2/DR3/DR6/DR7,r32
    0F 24 /r    MOV  r32,TR6/TR7                ; 386-486
    0F 26 /r    MOV  TR6/TR7,r32                ; 386-486
    0F 24 /r    MOV  r32,TR3/TR4/TR5            ; 486
    0F 26 /r    MOV  TR3/TR4/TR5,r32            ; 486


    Length and timing
    Operands    Bytes   8088    186     286     386     486     Pentium
    reg, reg     2       2       2       2       2       1       1   UV
    mem, reg  2+d(0-2)  13+EA    9       3       2       1       1   UV
    reg, mem  2+d(0-2)  12+EA   12       5       4       1       1   UV
    mem, imm  2+d(0-2)  14+EA   12-13    3       2       1       1   UV*
               +i(1,2)
    reg, imm  2+i(1,2)   4       3-4     2       2       1       1   UV

    acc, mem     3      14       8       5       4       1       1   UV
    mem, acc     3      14       9       3       2       1       1   UV

        * = not pairable if there is a displacement and immediate


                       Segment Register Moves

                               Real Mode
    Operands    Bytes   8088    186     286     386     486     Pentium
    seg, r16     2       2       2       2       2       3     2-11   NP
    seg, m16   2+d(0,2) 12+EA    9       5       5       3     3-12   NP
    r16, seg     2       2       2       2       2       3       1    NP
    m16, seg   2+d(0,2) 13+EA   11       3       2       3       1    NP


                       Protected Mode Differences
    Operands    Bytes                   286     386     486     Pentium
    seg, r16     2                      17      18       9     2-11*  NP
    seg, m16   2+d(0,2)                 19      19       9     3-12*  NP
                        * = add 8 if new descriptor; add 6 if SS


                    MOV to/from special registers (386+)

    Operands    Bytes                           386     486     Pentium
    r32, cr32    3                               6       4       4    NP
    cr32, r32    3                              4/10*   4/16*  12/22* NP

    r32, dr32    3                              14/22*  10      2/12* NP
    dr32, r32    3                              16/22*  11     11/12* NP

    r32, tr32    3                              12      3/4*     -    NP
    tr32, r32    3                              12      4/6*     -    NP

              * = Cycles depend on which special register