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SGDT            Store Global Descriptor Table Reg.   Flags: Not altered
SIDT            Store Interrupt Descriptor Table Reg.

SGDT destination                                     CPU: 286+ p
SIDT destination                                     CPU: 286+ p

        Logic   destination . GDTR
            or  destination . IDTR

    SGDT/SIDT copies the contents of the descriptor table register to
    the six bytes of memory indicated by the operand. The LIMIT field
    of the register is assigned to the first word at the effective
    address. If the operand-size attribute is 32 bits, the next three
    bytes are assigned the BASE field of the register, and the fourth
    byte is written with zero. The last byte is undefined. Otherwise,
    if the operand-size attribute is 16 bits, the next four bytes are
    assigned the 32-bit BASE field of the register. I.e. the 16-bit
    forms of SGDT/SIDT are compatible with the 80286, but only if the
    value in the upper 8 bits is not referenced; the '286 stores 1's
    in these bits, the '386+ stores 0's.

    SGDT and SIDT are used in operating system software; they are not
    normally used in application programs.


        Example:        sgdt  [pword ptr di]


    Opcode      Format
    0F 01 /0    SGDT m
    0F 01 /1    SIDT m


    Length and timing
    Operands    Bytes   8088    186     286     386     486     Pentium
SGDT  mem48       5                     11       9      10       4   NP
SIDT  mem48       5                     12       9      10       4   NP