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PUNPCKHBW       Unpack (interleave) High-order Bytes

PUNPCKHBW destination, source                        CPU: MMX

        Logic   mm(7..0)   <- mm(39..32)
                mm(15..8)  <- mm/m64(39..32)
                mm(23..16) <- mm(47..40)
                mm(31..24) <- mm/m64(47..40)
                mm(39..32) <- mm(55..48)
                mm(47..40) <- mm/m64(55..48)
                mm(55..48) <- mm(63..56)
                mm(63..56) <- mm/m64(63..56)

    PUNPCKHBW interleaves the four high-order bytes of the source operand
    and the four high-order bytes of the destination operand and writes
    them to the destination.

    The destination operand is an MMX register. The source operand can
    either be an MMX register or a 64-bit memory operand. 

    When unpacking from a memory operand, the full 64-bit operand is
    accessed from memory. PUNPCKHBW uses only the high-order 32 bits.


    Note
    If the source operand is all zeros, this instruction converts bytes
    to unsigned words.


    Opcode      Format
    0F 68 /r    PUNPCKHBW mm, mm/m64