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MAKE.EXE               Program Maintenance

Syntax:        MAKE [/N] <make filename>

Purpose:       To update the executable version of program after a
               change to one more of its source files.

Arguments:     /N directs MAKE to display but not execute commands
               specified in the make file.

               <make filename> is the name of the make file that
               contains dependency statements, inference rules,
               commands, and macro definitions.  Unlike other make
               programs, the make file must include the file extension.
               There is no default extension.  The <make filename> can
               optionally include a drive and/or path designator.

               Note: If the /N switch does not precede the
               <make filename>, it is ignored.

Description:   When invoked MAKE reads the specified make file and uses
               the specified rules to determine the set of actions to
               take place.  It does this by comparing the date of the
               target files against the date of the dependent files.  If
               any dependent file is more recent than its associated
               target file, the accompanying DOS commands are written to
               a batch file to be executed later.  If none of the
               dependent files are newer than the target file, the rule
               is bypassed and control passes to the next rule.

               As each dependency rule is processed, MAKE places the DOS
               commands to execute in a batch file called MAKEFILE.BAT
               and then invokes it.

               Components of a make file: An operational make file
               contains a number of different components as follows:

                 . Dependency statements
                 . Commands
                 . Inference rules
                 . Macros
                 . Comments

               The key component is the dependency statement which is
               used to create a dependency rule.  A dependency rule is a
               dependency statement followed by one or more DOS commands
               that looks like this:

                 <target file>: <dependent file1> [<dependent file2>...]
                    <command1>
                    [<command2>] ...

               The dependency statement consists of a target file
               definition followed by a colon and a list of dependent
               files separated by spaces.  This component establishes
               the dependency relationships between files.  Typically,
               the target file is the file to be updated by the command
               statement that follows if any of the dependent files have
               a newer date and time stamp.

               The command statements are standard DOS command lines,
               each specified on a separate line.  Path references can
               be used, but drive specifiers cannot.

               For example, TEST.OBJ is dependent on Test.prg.  To
               create TEST.OBJ, you must compile Test.prg.  The
               following rule produces this effect if Test.prg is newer
               than TEST.OBJ:

                    TEST.OBJ: Test.prg
                         CLIPPER Test.prg

               Likewise, the target .EXE file can be created with a
               similar rule.  In this example, assume WINDOW.OBJ is
               another compiled object file with its own rule.  The rule
               to create TEST.EXE is as follows:

                    TEST.EXE: TEST.OBJ WINDOW.OBJ
                         LINK TEST WINDOW,,,CLIPPER EXTEND

               Order of rules: The order in which rules appear in
               the make file is very important.  MAKE processes rules in
               the order encountered.  If one rule causes a file to be
               updated that is dependent on a target file of an earlier
               rule, the earlier rule will not be re-processed.  This
               means that object file rules should always precede
               executable file rules.

               Comments: The pound sign (#) indicates the text
               following to the end-of-line is to be ignored.  Comments
               can be on lines by themselves or embedded.  Embedded
               comments, however, can only be used on command lines and
               not on dependency rule lines.

               Macros: MAKE supports macros within the make file
               allowing you to associate a string of characters with a
               given name.  When MAKE encounters the macro name, it
               replaces the name with the associated string.  Macros can
               be nested allowing you the capability of assigning a
               macro name to another macro name.  The definition of a
               macro takes the following form:

                    macro name=value

               To subsequently use the macro, refer to it like this:

                    $(macro name)

               For example, the following statement creates a macro
               definition for a dependent file list:

                    files=TEST.OBJ TEST1.OBJ TEST2.OBJ

               Later in the make file you can use the macro as a
               substitute for the file list in a rule, like this:

                    TEST.EXE: $(files)


               Special pre-defined macros: In addition to
               user-defined macros there are three special pre-defined
               macros provided allowing access to target and dependent
               file information.

               Table: Pre-defined Special Macros
               ---------------------------------------------------------
                Macro         Meaning
               ---------------------------------------------------------
                $*            Returns the target filename the rule is
                              being applied to without the extension

                $**           Returns the complete list of target file
                              dependencies

                $@            Returns the target filename including
                              extension
               ---------------------------------------------------------

               For example, the following inference rule uses the $*
               pre-defined macro to return the name of the current
               (.prg) file without the extension.

                  .prg.obj:
                        CLIPPER $* -m

               Inference rules: An inference rule specifies a series
               of commands for a dependency statement not followed by a
               command list.  It is used whenever you have the same set
               of commands for several different dependency statements.

               To define an inference rule, use the following form:

                    .<dependent extension>.<target extension>:
                         <command1>
                         [<command2>]...

               When MAKE encounters a dependency statement without a
               command list, it searches for an inference rule that
               matches the extensions of the target and the dependent
               files in the dependency statement.  If an inference rule
               is found, MAKE executes the set of accompanying command
               statements.  For example, the following inference rule
               compiles all (.prg) files defined in dependency
               statements to .OBJ files:

                    .prg.obj
                         CLIPPER $*

Return codes:  MAKE sets the DOS return code when terminating to one of
               the following values:

               . 0 if the there is no error and the system is not up to
                 date.

               . 1 if there is a fatal error while MAKE is processing or
                 the system is up to date.

Notes:         . There is a danger that if an .EXE file has a large
                 number of dependent object files, the link line length
                 may be greater than 128 characters (the DOS command
                 line maximum).  In this case, create a linker response
                 file containing the list of dependent object files as
                 the files to link.  Then use it in place of the object
                 file list in the linker command line.

               . Spaces are not allowed after the last non-white space
                 character in a dependency statement.  If one is
                 encountered MAKE returns the error message "dependent
                 does not exist."  The reason for this error is that a
                 space is used as a delimiter between filenames in the
                 dependent file list and there is no file following
                 the space delimiter.

               . MAKE does not recognize a drive as a part of a file
                 specification within a command.  This means that you
                 cannot access Clipper from another drive within a
                 make file.  If the drive is specified, MAKE returns
                 the message "System is up to date."


 ----------------------------------- Example -------------------------------

   The following make file maintains RL.EXE (Clipper's create
   report and label program).

   # Macros.
   libs=CLIPPER, EXTEND
   objs=RLFRONT.OBJ RLBACK.OBJ RLDIALOG.OBJ
   exefile=RL.EXE

   # Inference rule for compiling (.prg) to .OBJ files.
   .prg.obj:
       CLIPPER $* -m

   # Inference rule for linking .OBJ files to an .EXE file.
   .obj.exe:
       PLINK86 OUTPUT $(exefile) FI $** LIB $(libs)

   # Dependency statements for .OBJ files.
   RLFRONT.OBJ: Rlfront.prg
   RLBACK.OBJ: Rlback.prg
   RLDIALOG.OBJ: Rldialog.prg

   # Dependency statement for the .EXE file.
   $(exefile): $(objs)