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X-Hacker.org- TMS320C2x DSP - syntax direct [<label>] lph <dma> http://www.X-Hacker.org [<<Previous Entry] [^^Up^^] [Next Entry>>] [Menu] [About The Guide]
SYNTAX      DIRECT   [<LABEL>] LPH <dma>
            INDIRECT [<LABEL>] LPH {ind}[,<next ARP>]

OPERANDS    0 . dma . 127; 0 . next ARP . 7.

EXECUTION   (PC) + 1 . PC
            (dma) . P register (31-16)

DESCRIPTION The P register high-order bits are loaded with the contents
            of data memory. The low-order P register bits are unaffected.

            The LPH instruction is primarily useful for restoring the
            high-order bits of the P register after subroutine calls or
            interrupts.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  0  1  0  0  1  1| 0| data memory address | DIRECT
            +-----------------------------------------------+

            15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  0  1  0  0  1  1| 1| see indirect fields | INDIRECT
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |  2+d  |  1+p  | 2+d+p  |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |  2+d  |  1+p  | 2+d+p  |   1   |  2+d  |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   | 2n+nd |  n+p  |2n+nd+p |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   | 1+n+nd|  n+p  |1+n+nd+p|   n   |1+n+nd |
            +------------------------------------------------+



EXAMPLE     LPH   DAT0        (DP = 4)
            or
            LPH   *           If current auxiliary register contains 512.

                    BEFORE              AFTER

            dm512     >F79C   dm512     >F79C
                P >30079844       P >F79C9844

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