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SYNTAX      DIRECT   [<LABEL>] SACL <dma>[,<shift>]
            INDIRECT [<LABEL>] SACL {ind}[,<shift>[,<next ARP>]]

OPERANDS    0 . dma . 127; 0 . next ARP . 7.
            0 . shift . 7 (defaults to 0) on the TMS320C25
            shift = 0, 1 or 4 on the TMS32020

EXECUTION   (PC) + 1 . PC
            16 LSB's of (ACC) * 2 ^ shift . dma
            Not affected by SXM.

DESCRIPTION The low-order bits of the accumulator are shifted 0, 1 or 4
            bits on the TMS32020 or 0 to 7 bits on the TMS320C25, as
            specified by the shift code, and stored in data memory. The
            low-order bits are filled with zeros, and the high-order bits
            are lost. The accumulator itself remains unaffected.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  1  0  0| shift  | 0| data memory address | DIRECT
            +-----------------------------------------------+

            15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  1  0  0| shift  | 1| see indirect fields | INDIRECT
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |  2+d  |  1+p  | 3+d+p  |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |  1+d  |  1+p  | 2+d+p  |   1   |  1+d  |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   | 2n+nd |  n+p  | 3n+nd+p|   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   |  n+nd |  n+p  |1+n+nd+p|   n   | n+nd  |
            +------------------------------------------------+



EXAMPLE     SACL  DAT11,1     (DP = 4)
            or
            SACH  *,1         If current auxiliary register contains 523.

                     BEFORE             AFTER

            ACC X >7C638421   ACC X >7C638421
                C                 C
            dm523        >5   dm523      >842

            Note: 8421 * 2^1 = 10842 . 842