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      Hardware stack allocation involves its use in interrupts, subroutine
      calls, pipelined instructions, and the emulator (XDS). The TMS320C2x
      disables all interrupts when taking an interrupt trap. If interrupts
      are enabled more than one instruction before the return of the
      interrupt service routine, the routine can also be interrupted, thus
      using another level of the hardware stack. This condition should be
      considered when managing the use of the stack. When nesting
      subroutine calls, each call uses a level of the stack. The number
      of levels used by the interrupt must be remembered as well as the
      depth of the nesting of subroutines. One level of stack is reserved
      for the emulator (XDS) to be used for breakpoint/single-step
      operations. If the XDS is not used, this extra level is available
      for internal use. Given these constraints, the following gives some
      possible allocations of the hardware stack levels:

      TMS32020
            1 level reserved for emulator (XDS) stack
            1 level reserved for TRAP (software interrupt) instruction
            1 level reserved for interrupt service routines (ISR)
            1 level available for subroutine calls.

      TMS320C25
            1 level reserved for emulator (XDS) stack
            1 level reserved for TRAP (software interrupt) instruction
            1 level reserved for interrupt service routines (ISR)
            5 levels available for subroutine calls.
        or
            1 level reserved for emulator (XDS) stack
            1 level reserved for TRAP (software interrupt) instruction
            2 level reserved for interrupt service routines (ISR)
            4 levels available for subroutine calls.

      When two levels are allocated for ISR's on the TMS320C25, the
      individual ISR's can utilize one level of subroutine calls or one
      level of interrupt nesting.